Performance metrics for asynchronous digital circuits applicable to computer-aided design

被引:0
作者
Parthasarathy, R [1 ]
Kourtev, IS [1 ]
机构
[1] Univ Pittsburgh, Dept Elect Engn, Pittsburgh, PA 15261 USA
来源
2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 5, PROCEEDINGS | 2004年
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Computer-Aided Design (CAD) circuit techniques for synchronous circuits generally improve the quality of a circuit based on previously specified performance metrics such as cycle-time, latency and throughput (often expressed in terms of the clock period). Limited techniques to minimize worst-case delays and physical area of asynchronous circuits have been developed. Optimization algorithms for these circuits must recognize their average-case speed and control performance by using quantifiable metrics specific to asynchronous circuits. The types of asynchronous circuits and the factors affecting their performance are surveyed in this paper. Techniques to compute and optimize the cycle-time, latency and throughput are analyzed to determine what these terms mean in the context of asynchronous circuits and the performance analysis of these circuits.
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页码:301 / 304
页数:4
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