A 2.4-GHz 0.25-μm CMOS dual-mode direct-conversion transceiver for bluetooth and 802.11b

被引:26
作者
Jung, YJ
Jeong, H
Song, E
Lee, JH
Lee, SW
Seo, DH
Song, I
Jung, SH
Park, J
Jeong, DK
Chae, SI
Kim, W [1 ]
机构
[1] Seoul Natl Univ, Sch Elect Engn & Comp Sci, Seoul 151742, South Korea
[2] GCT Semicond Inc, San Jose, CA 95131 USA
关键词
802.11b; active filter; bluetooth; de-offset cancellation; power-amplifier driver; programmable gain amplifier; receiver; transceiver; transmitter;
D O I
10.1109/JSSC.2004.829969
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A dual-mode transceiver integrates the transmitter of 0-dBm output, power and the receiver for both Bluetooth with -87 dBm sensitivity and 802.11b with, -86 dBm sensitivity in a single chip. A direct-conversion Architecture enables the maximum reuse and the optimal current consumption of the various building blocks in each mode for a low-cost and low-power solution. A single-ended power-amplifer (PA) driver transmits the nominal output power of 0 dBm with 18-dB gain control in 341 steps. Only little area overhead is required in the baseband active filter and programmable gain amplifier (PGA) to provide the dual-mode capability with optimized current consumption. The dc-offset cancellation scheme coupled with PGAs implements the very low high-pass cutoff frequency with a smaller. area than required by a simple coupling capacitor. Fabricated, in 0.25-mum CMOS process, the die area is 8.4 mm(2) including pads, and current consumption. in RX is 50 mA for-Bluetooth and 65 mA for 802.11b from a 2.7-V supply.
引用
收藏
页码:1185 / 1190
页数:6
相关论文
共 8 条
[1]  
Cho T, 2003, ISSCC DIG TECH PAP I, V46, P88
[2]  
Darabi H, 2003, ISSCC DIG TECH PAP I, V46, P86
[3]   DC-coupled IF stage design for a 900-MHz ISM receiver [J].
Harjani, R ;
Kim, J ;
Harvey, J .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (01) :126-134
[4]   A 2.7-V CMOS dual-mode baseband filter for PDC and WCDMA [J].
Hollman, T ;
Lindfors, S ;
Länsirinne, M ;
Jussila, J ;
Halonen, KAI .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (07) :1148-1153
[5]   A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems [J].
Koo, Y ;
Huh, H ;
Cho, Y ;
Lee, J ;
Park, J ;
Lee, K ;
Jeong, DK ;
Kim, W .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2002, 37 (05) :536-542
[6]   Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver [J].
Lee, KY ;
Lee, SW ;
Koo, Y ;
Huh, HK ;
Nam, HY ;
Lee, JW ;
Park, J ;
Lee, K ;
Jeong, DK ;
Kim, W .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (01) :43-53
[7]   A single-chip 2.4GHz direct-conversion CMOS transceiver with GFSK modem for Bluetooth application [J].
Lee, SW ;
Lee, KY ;
Song, E ;
Jung, YJ ;
Jeong, H ;
Kim, JM ;
Lim, HJ ;
Lee, JW ;
Park, J ;
Lee, K ;
Chae, SK ;
Jeong, DK ;
Kim, W .
2001 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2001, :245-246
[8]   A 2.4-GHz CMOS receiver for IEEE 802.11 wireless LAN's [J].
Razavi, B .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (10) :1382-1385