Ultra-low power source coupled FET logic gate configuration in GaAs MESFET technology

被引：0

作者：

Bushehri, E ^{[1
]}

Bratov, V ^{[1
]}

Starosselski, V ^{[1
]}

Schlichter, T ^{[1
]}

Milenkovic, S ^{[1
]}

Timochenkov, V ^{[1
]}

机构：

[1] Middlesex Univ, Ctr Microelect, London N11 2NQ, England

来源：

ELECTRONICS LETTERS | 2000年 / 36卷 / 01期

关键词：

D O I：

10.1049/el:20000016

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A source coupled FET logic gate configuration is proposed for achieving high speed and low power dissipation. A frequency of 2.4GHz has been achieved based an measurements on a divide-by -20 frequency divider, dissipating only 12mW from a single 2V power supply. The performance of the gate in terms of speed is comparable to that of the previously reported high speed source coupled FET logic while dissipating a fraction of the power.

引用

页码：36 / 38

页数：3

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