A Dual-Modulus Frequency Divider up to 128 GHz in SiGe BiCMOS Technology

被引：0

作者：

Ergintav, Arzu ^{[1
]}

Herzel, Frank ^{[1
]}

Korndoerfer, Falk ^{[1
]}

Mausolf, Thomas ^{[1
]}

Kissinger, Dietmar ^{[2
]}

Fischer, Gunter ^{[1
]}

机构：

[1] IHP Leibniz Inst Innovat Mikroelekt, Technol Pk 25, D-15236 Frankfurt, Oder, Germany

[2] Univ Ulm, Inst Elektron Bauelemente & Schaltungen, D-89081 Ulm, Germany

来源：

2022 17TH EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE (EUMIC 2022) | 2022年

关键词：

frequency divider; SiGe HBT; dual-modulus divider; phase-locked loop; millimeter-wave radar; LOW-POWER; CMOS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes a 2/3 dual-modulus frequency divider operating up to an input frequency of 128 GHz. It is built with emitter-coupled logic (ECL) based d-type flip-flops (DFFs) and AND gates, where the AND gates are merged with the input stages of the DFFs. Inductive shunt peaking is implemented to boost the speed performance. The dual-modulus divider consumes 28mA from a 3.3V supply. It is produced with the IHP's next generation SiGe:C BiCMOS technology SG13G3 with f(t)/f(max) values of 470 GHz/610 GHz. The circuit constitutes a key component of a fully programmable frequency divider which is essential in phase-locked loops for mmWave communication and radar systems.

引用

页码：48 / 51

页数：4

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