Tunable Holding-Voltage High Voltage ESD Devices

被引：0
|
作者：
Lee, Jian-Hsing [1 ]
Iyer, Natarajan Mahadeva [2 ]
机构：
[1] VIS Micro Inc, Device Dept, Campbell, CA 95008 USA
[2] Allegro Microsyst, Qual & Reliabil, 100 Crowley Dr, Marlborough, MA USA
来源：
2019 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2019年
关键词：
Laterally Diffused MOSFET (LDMOS); Transmission-Line Pulse (TLP); Electrostatic-Discharge (ESD); Safe-Operation Area (SOA);
D O I：
10.1109/irps.2019.8720522
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Physical understanding of the interaction of junction depth and the location of different Drain-side N-type implants on the holding-voltage of LDNMOS is presented. Using N-type well implants to modulate the junction depth, width and doping concentration results in change of the holding-voltage of LDMOS since the drain potential is a function of position in two dimensions.
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页数：8
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