An Energy-Efficient ECC Processor of UHF RFID Tag for Banknote Anti-Counterfeiting

被引:9
作者
Tan, Xi [1 ]
Dong, Mianxiong [2 ]
Wu, Cheng [1 ]
Ota, Kaoru [2 ]
Wang, Junyu [1 ]
Engels, Daniel W. [3 ]
机构
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China
[2] Muroran Inst Technol, Dept Informat & Elect Engn, Muroran, Hokkaido 0508585, Japan
[3] Southern Methodist Univ, Comp Sci & Engn Dept, Dallas, TX 75275 USA
来源
IEEE ACCESS | 2017年 / 5卷
基金
中国国家自然科学基金;
关键词
Enter radio frequency identification; elliptic curve cryptographic algorithm; low power; authentication;
D O I
10.1109/ACCESS.2016.2615003
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present the design and analysis of an energy-efficient 163-b elliptic curve cryptographic (ECC) processor suitable for passive ultrahigh frequency (UHF) radio frequency identification (RFID) tags that are usable for banknote authentication and anti-counterfeiting. Even partial public key cryptographic functionality has long been thought to consume too much power and to be too slow to be usable in passive UHF RFID systems. Utilizing a low-power design strategy with optimized register file management and an architecture based on the Lopez Dahab Algorithm, we designed a low-power ECC processor that is used with a modified ECC-DH authentication protocol. The ECC-DH authentication protocol is compatible with the ISO/IEC 18000-63 ("Gen2") passive UHF RFID protocol. The ECC processor requires 12 145 gate equivalents. The ECC processor consumes 5.04 nJ/b at a frequency of 960 kHz when implemented in a 0.13-mu m standard CMOS process. The tag identity authentication function requires 30 600 cycles to complete all scalar multiplication operations. This size, speed, and power of the ECC processor makes it practical to use within a passive UHF RFID tag and achieve up to 1500 banknote authentications per minute, which is sufficient for use in the fastest banknote counting machines.
引用
收藏
页码:3044 / 3054
页数:11
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