Low-Power 32-bit Dual-MAC 120 μW/MHz 1.0 V icyflex1 DSP/MCU Core

被引：17

作者：

Arm, Claude ^{[1
]}

Gyger, Steve ^{[1
]}

Masgonty, Jean-Marc ^{[1
]}

Morgan, Marc ^{[1
]}

Nagel, Jean-Luc ^{[1
]}

Piguet, Christian ^{[1
]}

Rampogna, Flavio ^{[1
]}

Volet, Patrick ^{[1
]}

机构：

[1] CSEM, CH-2002 Neuchatel, Switzerland

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2009年 / 44卷 / 07期

关键词：

Customizable; digital signal processor (DSP); icyflex; microcontroller; processor architecture; RISC; run-time reconfigurable; ultra low power;

D O I：

10.1109/JSSC.2009.2021924

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A low-power programmable processor named icytlex1 was designed combining features of a digital signal processor (DSP) and a micro-controller unit (MCU). Implemented as a synthesizable VHDL software intellectual property core, the processor implements a broad range of power saving features including its customizable architecture and reconfigurable instruction set. Its performance is compared with other processors from the market and values are given for its integration in a 180 run technology. The processor targets applications with tight power consumption constraints and correspondingly significant processing performance.

引用

页码：2055 / 2064

页数：10

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[1]

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Peiris, Vincent ;

Gyger, Steve ;

Severac, Daniel ;

Morgan, Marc ;

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[8]

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