Cryo-CMOS for Quantum Computing

被引:0
作者
Charbon, E. [1 ,2 ]
Sebastiano, F. [1 ]
Vladimirescu, A. [1 ,3 ,5 ]
Homulle, H. [1 ]
Visser, S. [1 ]
Song, L. [1 ,4 ]
Incandela, R. M. [1 ]
机构
[1] Delft Univ Technol, Delft, Netherlands
[2] Ecole Polytech Fed Lausanne, Lausanne, Switzerland
[3] Inst Super Elect Paris, Paris, France
[4] Tsinghua Univ, Beijing, Peoples R China
[5] Univ Calif Berkeley, Berkeley, CA USA
来源
2016 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | 2016年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Cryogenic CMOS, or cryo-CMOS circuits and systems, are emerging in VLSI design for many applications, in primis quantum computing. Fault-tolerant quantum bits (qubits) in surface code configurations, one of the most accepted implementations in quantum computing, operate in deep sub-Kelvin regime and require scalable classical control circuits. In this paper we advocate the need for a new generation of deep-submicron CMOS circuits operating at deep-cryogenic temperatures to achieve the perfounance required in a fault-tolerant qubit system. We outline the challenges and limitations of operating CMOS in near-zero Kelvin regimes and we propose solutions. The paper concludes with several examples showing the suitability of integrating fault-tolerant. qubits with CMOS.
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页数:2
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