FPGA Implementation of Real-time Digital Image Stabilization

In order to overcome image shakes in the video of the camera mounted on a movable platform and to implement the image stabilization in real-time, a FPGA platform of real-time digital image stabilization ( DIS) based on bit-plane matching was realized. Firstly, the local motion vectors were estimated by using Gray Code bit-plane matching. Then, the global motion vector was generated with a median filter method. Following that, a low pass filter was applied on the previous global motion vectors to get the current motion compensation vector. At last, the stabilized video was obtained by compensation the original one. A multi-bits concurrent matching method was used when estimating the local motion vectors using the bit-plane, which increased the parallelism of the FPGA and speeded up the matching velocity. The FPGA implementation of the function modules of video capture control, image buffering, motion estimation, motion filtering, and motion compensation were detailed out. The experiment results indicate that the proposed method can stabilize the 25 fps video with 720x576 pixels in real-time, and can be applied in real-time applications.