0.8-V Supply Voltage Deep-Submicrometer Inversion-Mode In0.75Ga0.25As MOSFET

被引：73
作者：
Wu, Y. Q. [1 ,2 ]
Wang, W. K. [3 ]
Koybasi, O. [1 ,2 ]
Zakharov, D. N. [1 ,2 ]
Stach, E. A. [1 ,2 ]
Nakahara, S. [3 ]
Hwang, J. C. M. [3 ]
Ye, P. D. [1 ,2 ]
机构：
[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
[2] Purdue Univ, Birck Nanotechnol Ctr, W Lafayette, IN 47907 USA
[3] Lehigh Univ, Dept Elect & Comp Engn, Bethlehem, PA 18105 USA
来源：
IEEE ELECTRON DEVICE LETTERS | 2009年 / 30卷 / 07期
基金：
美国国家科学基金会;
关键词：
Atomic layer deposition; high-k; InGaAs; MOSFET; HIGH-PERFORMANCE; INGAAS MOSFET; GATE STACK; ENHANCEMENT; CHANNEL; TRANSISTOR; MOBILITY; HFALO;
D O I：
10.1109/LED.2009.2022346
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We report the experimental demonstration of deep-submicrometer inversion-mode In0.75Ga0.25As MOSFETs with ALD high-k Al2O3 as gate dielectric. In this letter, n-channel MOSFETs with 100-200-nm-long gates have been fabricated. At a supply voltage of 0.8 V, the fabricated devices with 200-130-nm-long gates exhibit drain currents of 232-440 mu A/mu m and transconductances of 538-705 mu S/mu m. The 100-nm device has a drain current of 801 mu A/mu m and a transconductance of 940 mu S/mu m. However, the device cannot be pinched off due to severe short-channel effect. Important scaling metrics, such as on/off current ratio, subthreshold swing, and drain-induced barrier lowering, are presented, and their relations to the short-channel effect are discussed.
引用
收藏
页码：700 / 702
页数：3
相关论文
共 18 条
[1]   Benchmarking nanotechnology for high-performance and low-power logic transistor applications [J].
Chau, R ;
Datta, S ;
Doczy, M ;
Doyle, B ;
Jin, J ;
Kavalieros, J ;
Majumdar, A ;
Metz, M ;
Radosavljevic, M .
IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2005, 4 (02) :153-158
[2]   In situ surface passivation and CMOS-compatible palladium-germanium contacts for surface-channel gallium arsenide MOSFETs [J].
Chin, Hock-Chun ;
Zhu, Ming ;
Tung, Chih-Hang ;
Samudra, Ganesh S. ;
Yeo, Yee-Chia .
IEEE ELECTRON DEVICE LETTERS, 2008, 29 (06) :553-556
[3]  
Datta S, 2005, INT EL DEVICES MEET, P783
[4]   Inversion mode n-channel GaAs field effect transistor with high-k/metal gate [J].
De Souza, J. P. ;
Kiewra, E. ;
Sun, Y. ;
Callegari, A. ;
Sadana, D. K. ;
Shahidi, G. ;
Webb, D. J. ;
Fompeyrine, J. ;
Germann, R. ;
Rossel, C. ;
Marchiori, C. .
APPLIED PHYSICS LETTERS, 2008, 92 (15)
[5]   Enhancement-mode GaAs MOSFETs with an In0.3Ga0.7As channel, a mobility of over 5000 cm2/V•s, and transconductance of over 475 μS/μm [J].
Hill, Richard J. W. ;
Moran, David A. J. ;
Li, Xu ;
Zhou, Haiping ;
Macintyre, Douglas ;
Thoms, Stephen ;
Asenov, Asen ;
Zurcher, Peter ;
Rajagopalan, Karthik ;
Abrokwah, Jonathan ;
Droopad, Ravi ;
Passlack, Matthias ;
Thayne, Lain G. .
IEEE ELECTRON DEVICE LETTERS, 2007, 28 (12) :1080-1082
[6]   30-nm InAs pseudomorphic HEMTs on an InP substrate with a current-gain cutoff frequency of 628 GHz [J].
Kim, Dae-Hyun ;
del Alamo, Jesus A. .
IEEE ELECTRON DEVICE LETTERS, 2008, 29 (08) :830-833
[7]   Logic suitability of 50-nm In0.7Ga0.3AsHEMTs for Beyond-CMOS applications [J].
Kim, Dae-Hyun ;
del Alamo, Jesus A. ;
Lee, Jae-Hak ;
Seo, Kwang-Seok .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (10) :2606-2613
[8]   In0.53Ga0.47As based metal oxide semiconductor capacitors with atomic layer deposition ZrO2 gate oxide demonstrating low gate leakage current and equivalent oxide thickness less than 1 nm [J].
Koveshnikov, S. ;
Goel, N. ;
Majhi, P. ;
Wen, H. ;
Santos, M. B. ;
Oktyabrsky, S. ;
Tokranov, V. ;
Kambhampati, R. ;
Moore, R. ;
Zhu, F. ;
Lee, J. ;
Tsai, W. .
APPLIED PHYSICS LETTERS, 2008, 92 (22)
[9]   Inversion-mode self-aligned In0.53Ga0.47AsN-channel metal-oxide-semiconductor field-effect transistor with HfAlO gate dielectric and TaN metal gate [J].
Lin, J. Q. ;
Lee, S. J. ;
Oh, H. J. ;
Lo, G. Q. ;
Kwong, D. L. ;
Chi, D. Z. .
IEEE ELECTRON DEVICE LETTERS, 2008, 29 (09) :977-980
[10]  
Lin JQ, 2008, INT EL DEVICES MEET, P401
12