共 50 条
- [41] Canary Devices for Through-Silicon Vias A Condition Monitoring Approach 2017 INTERNATIONAL CONFERENCE ON ELECTRONICS PACKAGING (ICEP), 2017, : 282 - 287
- [44] Novel Approaches for Low-Cost Through-Silicon Vias EMPC-2011: 18TH EUROPEAN MICROELECTRONICS & PACKAGING CONFERENCE, 2011,
- [45] Analytical Heat Transfer Model for Thermal Through-Silicon Vias 2011 DESIGN, AUTOMATION & TEST IN EUROPE (DATE), 2011, : 491 - 496
- [47] Copper Electrodeposition Parameters Optimization for Through-Silicon Vias Filling PROCESSING, MATERIALS, AND INTEGRATION OF DAMASCENE AND 3D INTERCONNECTS, 2010, 25 (38): : 109 - 118
- [48] Investigating the Tapered Profiles on the Parasitic Inductance of Through-Silicon Vias IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2024, 14 (11): : 2128 - 2131