Integration of a low-k α-SiOC:H dielectric with Cu interconnects

被引:0
|
作者
Ahn, JH [1 ]
Lee, KT [1 ]
Oh, BJ [1 ]
Lee, YJ [1 ]
Liu, SH [1 ]
Jung, MK [1 ]
Kim, YW [1 ]
Suh, KP [1 ]
机构
[1] Samsung Elect, Semicond Syst LSI Business, Yongin 449711, South Korea
关键词
Cu interconnect; low-k dielectric; bowing; overhang;
D O I
暂无
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
Successful integration of an alpha-SiOC:H dielectric with copper interconnects was achieved in this study, and the importance of their compatibility was emphasized for practical applications. Bowing of alpha-SiOC:H dielectrics during conventional post-etch treatment deteriorated the gapfill properties and generated voids in the metals. The resistance value of Cu for alpha-SiOC:H stacked structures was higher than that for fluorinated SiO2 stacked structures due to bowing-induced voids. Moreover, the fail ratio of 0.12-mum-wide copper interconnects for alpha-SiOC:H stacked structures decreased with decreasing thickness of the TaN barrier metal, which was attributed to the overhang effect. Overhang-induced voids were eliminated in our study by lowering the TaN thickness. The bowing of alpha-SiOC:H dielectrics was found to result from C stripping out from the dielectric itself; the damaged layer caused by oxygen-plasma treatment was peeled out during the wet-stripping process. By modifying the conventional process, i.e., by applying a hydrogen-based ashing process and a new chemical with little damage, we achieved a drastic improvement in the profile and reliability of alpha-SiOC:H stacked structures.
引用
收藏
页码:422 / 426
页数:5
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