A 165-Gb/s 4:1 multiplexer in InP DHBT technology

被引：25
作者：
Hallin, Joakim [1 ]
Kjellberg, Torgil [1 ]
Swaim, Thomas [1 ]
机构：
[1] Chalmers Univ Technol, Microwave Elect Lab, S-41296 Gothenburg, Sweden
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2006年 / 41卷 / 10期
关键词：
4 : 1 multiplexer; high-speed digital circuit; InP DHBT;
D O I：
10.1109/JSSC.2006.878114
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a 4:1 multiplexer fabricated in InP double heterojunction bipolar transistor (DHBT) technology. The multiplexer works up to 165 Gb/s at a supply voltage of -3.2 V consuming 1.6,W. It is a half-rate multiplexer using a multi-phase clock architecture. The main design challenge was to ensure correct timing between clock and data signals.
引用
收藏
页码：2209 / 2214
页数：6
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