共 5 条
[1]
Duvvury C, 1995, INTERNATIONAL ELECTRON DEVICES MEETING, 1995 - IEDM TECHNICAL DIGEST, P345, DOI 10.1109/IEDM.1995.499211
[2]
Lateral DMOS design for ESD robustness
[J].
INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST,
1997,
:375-378
[3]
DUVVURY C, 1994, INTERNATIONAL ELECTRON DEVICES MEETING 1994 - IEDM TECHNICAL DIGEST, P407, DOI 10.1109/IEDM.1994.383381
[4]
Jian-Hsing Lee, 1999, Proceedings of the 1999 7th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.99TH8394), P162, DOI 10.1109/IPFA.1999.791327
[5]
KUNZ K, 2001, EOS ESD S P, P13