The analysis and improvement of a current-steering DAC's dynamic SFDR-III: The output-dependent delay differences

被引：37

作者：

Chen, Tao ^{[1
]}

Gielen, Georges ^{[1
]}

机构：

[1] Katholieke Univ Leuven, ESAT MICAS, B-3001 Heverll, Belgium

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | 2007年 / 54卷 / 02期

关键词：

current-steering digital-to-analog converters (DACs); glitch; output-dependent delay difference (ODDD); output variation; spurious-free dynamic range (SFDR);

D O I：

10.1109/TCSI.2006.887598

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

For a current-steering digital-to-analog converter (DAC) without an extra output stage, the variation of the output voltage will result in the variation of the output delay. These output-dependent delay differences will deteriorate the spurious-free dynamic range (SFDR) of a high-speed high-accuracy DAC, especially when glitches exist. In this paper, a convenient mathematical model is presented to analyze during design the impact of this kind of delay differences on the SFDR. The results are verified by comparison to the results of more detailed simulations. Also the impact of glitches on this effect is demonstrated. Possible solutions to reduce this impact are discussed and summarized.

引用

页码：268 / 279

页数：12

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