Lifting-Based Fractional Wavelet Filter: Energy-Efficient DWT Architecture for Low-Cost Wearable Sensors

被引:1
作者
Tausif, Mohd [1 ]
Khan, Ekram [2 ]
Hasan, Mohd [2 ]
Reisslein, Martin [3 ]
机构
[1] Univ Beira Interior, Dept Informat, Fac Engn, Covilha, Portugal
[2] Aligarh Muslim Univ, Dept Elect Engn, Zakir Husain Coll Engn & Technol, Aligarh 202002, Uttar Pradesh, India
[3] Arizona State Univ, Sch Elect Comp & Energy Engn, Goldwater Ctr, East Tyler Mall 650,MC 5706, Tempe, AZ 85287 USA
关键词
COMPRESSION SCHEME; VLSI ARCHITECTURE; TRANSFORM; IOT; DEVICES; COMPLEXITY; VIDEO; CONSTRUCTION; TECHNOLOGIES; CHALLENGES;
D O I
10.1155/2020/8823689
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes and evaluates the LFrWF, a novel lifting-based architecture to compute the discrete wavelet transform (DWT) of images using the fractional wavelet filter (FrWF). In order to reduce the memory requirement of the proposed architecture, only one image line is read into a buffer at a time. Aside from an LFrWF version with multipliers, i.e., the LFrWFm, we develop a multiplier-less LFrWF version, i.e., the LFrWFml, which reduces the critical path delay (CPD) to the delay Ta of an adder. The proposed LFrWFm and LFrWFml architectures are compared in terms of the required adders, multipliers, memory, and critical path delay with state-of-the-art DWT architectures. Moreover, the proposed LFrWFm and LFrWFml architectures, along with the state-of-the-art FrWF architectures (with multipliers (FrWFm) and without multipliers (FrWFml)) are compared through implementation on the same FPGA board. The LFrWFm requires 22% less look-up tables (LUT), 34% less flip-flops (FF), and 50% less compute cycles (CC) and consumes 65% less energy than the FrWFm. Also, the proposed LFrWFml architecture requires 50% less CC and consumes 43% less energy than the FrWFml. Thus, the proposed LFrWFm and LFrWFml architectures appear suitable for computing the DWT of images on wearable sensors.
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页数:13
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