Protecting Against Emerging Vmin Failures in Advanced Technology Nodes
被引:0
|
作者:
Lee, J. K. Jerry
论文数: 0引用数: 0
h-index: 0
机构:
Cisco Syst Inc, San Jose, CA 95134 USACisco Syst Inc, San Jose, CA 95134 USA
Lee, J. K. Jerry
[1
]
Haggag, Amr
论文数: 0引用数: 0
h-index: 0
机构:
Freescale Semicond Inc, Austin, TX USACisco Syst Inc, San Jose, CA 95134 USA
Haggag, Amr
[2
]
Eklow, William
论文数: 0引用数: 0
h-index: 0
机构:
Cisco Syst Inc, San Jose, CA 95134 USACisco Syst Inc, San Jose, CA 95134 USA
Eklow, William
[1
]
机构:
[1] Cisco Syst Inc, San Jose, CA 95134 USA
[2] Freescale Semicond Inc, Austin, TX USA
来源:
2014 IEEE INTERNATIONAL TEST CONFERENCE (ITC)
|
2014年
关键词:
INVERTED TEMPERATURE-DEPENDENCE;
IMPACT;
D O I:
暂无
中图分类号:
TP3 [计算技术、计算机技术];
学科分类号:
0812 ;
摘要:
As technology and voltage scale, both intrinsic and extrinsic Vmin failures can occur at a significant rate. These failures can impact yield and reliability. We propose a novel guardband and advanced outlier limits (AOL) methodology to protect against intrinsic and extrinsic Vmin failures. This paper will demonstrate the impact of aging, RTN and HKMG process variation on Vmin. The data will be used to establish guardbands and AOL to minimize failures during testing and in the field.