Energy-efficient motion estimation using error-tolerance

被引：38

作者：

Varatkar, Girish V. ^{[1
]}

Shanbhag, Naresh R. ^{[1
]}

机构：

[1] Univ Illinois, Coordinated Sci Lab, Urbana, IL 61801 USA

来源：

ISLPED '06: PROCEEDINGS OF THE 2006 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN | 2006年

关键词：

low-power; noise-tolerance;

D O I：

10.1109/LPE.2006.4271817

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Presented is an energy-efficient motion estimation architecture using error-tolerance. The technique employs overscaling of the supply voltage (voltage overscaling (VOS)) to reduce power at the expense of timing errors, which are then corrected using algorithmic noise-tolerance (ANT) techniques. Referred to as input subsampled replica ANT (ISR-ANT), the proposed technique incorporates an input subsampled replica of the main sum of absolute difference (MSAD) block for obtaining the motion vectors in the presence of errors induced by VOS. Simulations show that the proposed technique can save up to 60% power over an optimal error-free present day system in a 130nm CMOS technology. Power savings increase to 79% in a 45nm predictive process technology.

引用

页码：113 / 118

页数：6

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