Reliability Analysis of Logic Circuits Using Binary Probabilistic Transfer Matrix

Technology scales strongly increased the sensitivity of new integrated logic circuits to transient faults. Since the reliability of combinational circuit is an important factor in digital circuits design, so, a fast method to obtain accurate value of reliability becomes a main challenge. The main source of inaccuracy and scalability problems in existing methods is the presence of reconverging signals. In this paper a new library-based method is proposed to calculate the circuit reliability in which the effects of nested reconvergent paths is considered easily. So a binary probability matrix is used to resolve signals correlation problem. Simulation results show that our proposed method gives accurate reliability value with less complexity than previous methods.