A study of the threshold voltage variations for ultrathin body double gate SOI MOSFETs

被引:0
作者
Tang, CS [1 ]
Lo, SC [1 ]
Lee, JW [1 ]
Tsai, JH [1 ]
Li, YM [1 ]
机构
[1] Natl Chiao Tung Univ, Dept Electrophys, Hsinchu 300, Taiwan
来源
NSTI NANOTECH 2004, VOL 3, TECHNICAL PROCEEDINGS | 2004年
关键词
double-gate devices; ultrathin body; quantum mechanical effects; threshold voltage; modeling and simulation;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Silicon on insulator (SOI) devices have been of great interest in these years. In this paper, simulation with density-gradient transport model is performed to examine the variation of threshold voltage (VTH) for double gate SOI MOSFETs. Different thickness of silicon (Si) film, oxide thickness, channel length and doping concentration are considered in this work. According to the numerical study, both drift-difftision (DD) and density gradient (DG) models demonstrate that the thickness of Si film greatly affects the threshold voltage (5 similar to 15% variation). It is found that the thickness of Si film decreases, VTH variation increases; and the dependence relation is nonlinear. Therefore, this effect must be taken into account for the realization of double gate SOI ULSI circuit.
引用
收藏
页码:145 / 148
页数:4
相关论文
共 50 条
  • [21] On the gm/ID-based approaches for threshold voltage extraction in advanced MOSFETs and their application to ultra-thin body SOI MOSFETs
    Rudenko, T.
    Arshad, M. K. Md
    Raskin, J-P
    Nazarov, A.
    Flandre, D.
    Kilchytska, V.
    SOLID-STATE ELECTRONICS, 2014, 97 : 52 - 58
  • [22] A Threshold Voltage Model of Silicon-Nanotube-Based Ultrathin Double Gate-All-Around (DGAA) MOSFETs Incorporating Quantum Confinement Effects
    Kumar, Arun
    Bhushan, Shiv
    Tiwari, Pramod Kumar
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2017, 16 (05) : 868 - 875
  • [23] Threshold Voltage Sensitivity Reduction of SOI Four Gate Transistor
    Islam, Md. Sariful
    Debnath, Bishwajit
    Noor, Samantha Lubaba
    Hassan, Muhsiul
    Haq, A. F. M. Saniul
    Khan, M. Ziaur Rahman
    2012 7TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (ICECE), 2012,
  • [24] Mobility Enhancement by Back-Gate Biasing in Ultrathin SOI MOSFETs With Thin BOX
    Ohata, A.
    Bae, Y.
    Fenouillet-Beranger, C.
    Cristoloveanu, S.
    IEEE ELECTRON DEVICE LETTERS, 2012, 33 (03) : 348 - 350
  • [25] Analytical Modeling of RDF Effects on the Threshold Voltage in Short-Channel Double-Gate MOSFETs
    Graef, Michael
    Hain, Franziska
    Hosenfeld, Fabian
    Horst, Fabian
    Farokhnejad, Atieh
    Iniguez, Benjamin
    Kloes, Alexander
    PROCEEDINGS OF THE 24TH INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS - MIXDES 2017, 2017, : 127 - 131
  • [26] A physical short-channel threshold voltage model for undoped symmetric double-gate MOSFETs
    Chen, QA
    Harrell, EM
    Meindl, JD
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (07) : 1631 - 1637
  • [27] Analytical threshold voltage model for short-channel asymmetrical dual-gate material double-gate MOSFETs
    Tsormpatzoglou, A.
    Pappas, I.
    Tassis, D. H.
    Dimitriadis, C. A.
    Ghibaudo, G.
    MICROELECTRONIC ENGINEERING, 2012, 90 : 9 - 11
  • [28] Detailed comparison of threshold voltage extraction methods in FD-SOI MOSFETs
    Pananakakis, Georges
    Ghibaudo, Gerard
    Cristoloveanu, Sorin
    SOLID-STATE ELECTRONICS, 2023, 209
  • [29] Mobility and threshold-voltage comparison between (110)- and (100)-oriented ultrathin-body silicon MOSFETs
    Tsutsui, Gen
    Hiramoto, Toshiro
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (10) : 2582 - 2588
  • [30] Enhancement of adjustable threshold voltage range by substrate bias due to quantum confinement in ultrathin body SOI pMOSFETs
    Tsutsui, G
    Nagumo, T
    Hiramoto, T
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2003, 2 (04) : 314 - 318