Optimizing the Reversible Circuits Using Complementary Control Line Transformation

被引：0

作者：

Parlapalli, Sai Phaneendra ^{[1
]}

Vudadha, Chetan ^{[1
]}

Srinivas, M. B. ^{[1
]}

机构：

[1] Birla Inst Technol & Sci BITS Pilani, Dept Elect Engn, Hyderabad Campus, Hyderabad, Andhra Prades, India

来源：

REVERSIBLE COMPUTATION, RC 2017 | 2017年 / 10301卷

关键词：

D O I：

10.1007/978-3-319-59936-6_9

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In this paper, a transformation method is presented which converts complementary control lines of a reversible gate pair to equal/similar control lines. A set of optimization rules is discussed that take advantage of the increased equal control lines to reduce the cost. A greedy optimization algorithm, which uses the proposed transformation method and the optimization rules, is presented. Results for a large set of benchmarks confirm that the proposed algorithm performs better when compared with other Exclusive-OR Sum-Of-Product (ESOP) based methods available in the literature.

引用

页码：111 / 126

页数：16

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