An on-chip high-efficiency DC-DC converter with a compact timing edge control circuit

被引：7

作者：

Ogawa, T ^{[1
]}

Hatanaka, S ^{[1
]}

Taniguchi, K ^{[1
]}

机构：

[1] Osaka Univ, Dept Elect & Informat Syst, Suita, Osaka 5650871, Japan

来源：

2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2002年

关键词：

D O I：

10.1109/VLSIC.2002.1015104

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We developed an on-chip DC-DC converter with a compact timing edge control circuit operating at high clock frequency. The circuit generates four states to control nearly ideal switchings of output transistors depending on the voltages sensed at two terminals across an off-chip output inductor. High efficiency can be achieved due to nearly exact timing edge control with the aid of a high frequency clock by eliminating the conventional dead time control circuit. The DC-DC converter is fabricated in 0.25um CMOS process with single polysilicon and triple metal. The experimental results at 2.5V output show efficiency over 90% with a off-chip filter consisting of a inductor of 220muH and a ceramic capacitor of 47muF. The converter has maximum efficiency of 93.3% with 29mV ripple at 37mA load current.

引用

页码：278 / 279

页数：2