Analysis of electromigration voiding phenomena in Cu interconnects

被引：3

作者：

Arnaud, L. ^{[1
]}

Guillaumond, J. F. ^{[1
,2
]}

Claret, N. ^{[1
]}

Cayron, C. ^{[3
]}

Guedj, C. ^{[1
]}

Dupeux, M. ^{[4
]}

Arnal, V. ^{[2
]}

Reimbold, G. ^{[1
]}

Passemard, G. ^{[2
]}

Torres, J. ^{[2
]}

机构：

[1] CEA, LETI, 17 Rue Martyrs, F-38054 Grenoble, France

[2] STMicroelect, Crolles, France

[3] CEA, LITEN, F-38054 Grenoble, France

[4] LTPCM, F-38402 St Martin Dheres, France

来源：

2006 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 44TH ANNUAL | 2006年

关键词：

electromigration; interconnects; Cu; voiding;

D O I：

10.1109/RELPHY.2006.251319

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The purpose of this paper is to show the role of the sidewall barrier on the nucleation / growth of electromigration induced voids in Cu interconnects. A comparison is made between an anisotropic PVD process and a conformal CVD process. Standard electromigration (EM) and scanning electron microscopy (SEM) give a clear picture of the failure mechanisms. SEM shows the steps of void growth in 120 nm linewidth. EBSD (Electron Backscattering Diffraction) shows that voids are nucleated at grain boundary.

引用

页码：675 / +

页数：2

共 7 条

[1] Process optimisation and dual damascene integration of porous CVD SiOC dielectric at 2.4 and 2.2 k-values for 45 nm CMOS technology [J].