A Compensation Technique for SAR ADC Comparator Noise

被引:0
|
作者
Liu, Xiao [1 ]
Dehollain, Catherine [1 ]
机构
[1] Ecole Polytech Fed Lausanne, Radio Frequency Integrated Circuit Grp RFIC, CH-1015 Lausanne, Switzerland
来源
2013 IEEE 20TH INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS) | 2013年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes a new way to compensate comparator errors in successive approximation analog-to-digital convertor (SAR ADC). The method adds negatively biased capacitance to traditional binary-scaled compensation, increasing ADC accuracy by up to 20%. A novel digital-to-analog convertor (DAC) structure is introduced to further increase its efficiency, which reduces total capacitance by 80%. According to mathematical and Cadence simulation, the proposed method provides an efficient trade-off between accuracy and conversion speed.
引用
收藏
页码:145 / 148
页数:4
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