Partitioning and Interface Synthesis in Hierarchical Multiprocessor Real-Time Systems

被引：3

作者：

Biondi, Alessandro ^{[1
]}

Buttazzo, Giorgio ^{[1
]}

Bertogna, Marko ^{[2
]}

机构：

[1] Scuola Super Sant Anna, Pisa, Italy

[2] Univ Modena & Reggio Emilia, Modena, Italy

来源：

PROCEEDINGS OF THE 24TH INTERNATIONAL CONFERENCE ON REAL-TIME NETWORKS AND SYSTEMS PROCEEDINGS (RTNS 2016) | 2016年

关键词：

D O I：

10.1145/2997465.2997489

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Hierarchical scheduling is an effective approach developed to support the integration of independently developed applications on the same computing platform. In particular, the M-BROE framework has been recently proposed and analyzed to efficiently support component-based development on multiprocessor platforms through the virtual multiprocessor abstraction implemented by reservation servers, in the presence of shared resources. However, the problems of partitioning applications to virtual processors and defining reservation parameters were not addressed. This paper fills this gap by proposing a design methodology as an optimization problem for partitioning applications to virtual processors, performing a synthesis of the component interface and allocating virtual processors to physical processors. Experimental results are also presented to evaluate the proposed methodology.

引用

页码：257 / 266

页数：10

共 27 条

[21]

Gai P., 2001, P IEEE REAL TIM SYST

[22]

Khalilzad N, 2015, P 21 IEEE INT C EMB

[23] SCHEDULING ALGORITHMS FOR MULTIPROGRAMMING IN A HARD-REAL-TIME ENVIRONMENT [J].