Multiband Integrated Synthetic Aperture Radar (SAR) Receiver

被引：0

作者：

Abu Bakar, Faizah ^{[1
]}

Holmberg, Jan ^{[2
]}

Nieminen, Tero ^{[1
]}

Nehal, Qaiser ^{[1
]}

Ukkonen, Pekka ^{[1
]}

Saari, Ville ^{[1
]}

Halonen, Kari ^{[1
]}

Aberg, Markku ^{[2
]}

Sundberg, Iiro ^{[3
]}

机构：

[1] Aalto Univ, Sch Elect Engn, SMARAD 2, Dept Micro & Nanosci, POB 11000, FI-00076 Aalto, Finland

[2] VTT Tech Res Ctr Finland, FI-02044 Espoo, Finland

[3] DA Design Oy, FI-31600 Jokioinen, Finland

来源：

2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS) | 2012年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An integrated receiver consisting of RF front ends, analog baseband chain with an analog to digital converter (ADC) for a Synthetic Aperture Radar (SAR) implemented in 130 nm CMOS technology is presented in this paper. The circuits are integrated on a single chip with a size of 10.88 mm(2). The RF front end consists of three parallel signal channels intended for L,C and X-band of the SAR receiver. The baseband (BB) is selectable between 50 MHz and 160 MHz bandwidths through switches. The ADC has selectable mode of 5, 6, 7 and 8 bits via control switches. The receiver has a nominal gain of 40 dB and 37 dB and noise figure of 11 dB and 13.5 dB for 160 MHz BB filter at room temperature for L-band and C-band, respectively. The circuits, which use a 1.2 V supply voltage, dissipate maximum power of 650 mW with 50 MHz baseband and 8 bit mode ADC, and maximum power of 800 mW with 160 MHz baseband and 8 bit mode ADC.

引用

页码：713 / 716

页数：4