Effect of resistance-area-product and thermal environment on writing of magneto-thermal MRAM

Blocking temperature written magnetic random access memory element test structures of various sizes and tunnel barrier resistance area products were fabricated in order to study the dependence of writing efficiency and tunnel junction integrity on the thermal environment of the memory element and tunnel junction resistance area product. The test structures were programmed using a CPP writing mode, where the device is heated by passing a small current through the tunnel junction. The device is then field cooled to set the direction of an IrMn/NiFeCo storage layer. Quasistatic write current was measured as a function of resistance area product and for underlayers with differing thermal conductivities. Linear fits to the size dependent write current data suggest that properly designed submicron bits can be written quasi tatically at < 100 mu A. Write current for a fixed thermal environment was found to depend inversely on resistance product, but too large a resistance area product causes the tunnel barriers to fail before the memory element can be heated above the blocking temperature of the storage layer. In addition, if the thermal conductivity between the magnetic tunnel junction and substrate is too small, the magnetic tunnel junction will fail before the blocking temperature is reached, even at very low resistance area product values. Proper device design should thus optimize cell thermal resistance and tunnel junction resistance for both reliability and minimum power consumption.