FDSOI devices with thin BOX and ground plane integration for 32 nm node and below

被引：96

作者：

Fenouillet-Beranger, C. ^{[1
,2
]}

Denorme, S. ^{[1
]}

Perreau, P. ^{[1
,2
]}

Buj, C. ^{[2
]}

Faynot, O. ^{[2
]}

Andrieu, F. ^{[2
]}

Tosti, L. ^{[2
]}

Barnola, S. ^{[2
]}

Salvetat, T. ^{[2
]}

Garros, X. ^{[2
]}

Casse, M. ^{[2
]}

Allain, F. ^{[2
]}

Loubet, N. ^{[1
]}

Pham-Nguyen, L. ^{[1
,3
]}

Deloffre, E. ^{[1
]}

Gros-Jean, M. ^{[1
]}

Beneyton, R. ^{[1
]}

Laviron, C. ^{[1
,2
]}

Marin, M. ^{[1
]}

Leyris, C. ^{[1
]}

Haendler, S. ^{[1
]}

Leverd, F. ^{[1
]}

Gouraud, P. ^{[1
]}

Scheiblin, P. ^{[2
]}

Clement, L. ^{[1
]}

Pantel, R. ^{[1
]}

Deleonibus, S. ^{[2
]}

Skotnicki, T. ^{[1
]}

机构：

[1] ST Microelet, F-38926 Crolles, France

[2] CEA LETI Minatec, F-38054 Grenoble 9, France

[3] IMEP, F-38016 Grenoble 1, France

来源：

SOLID-STATE ELECTRONICS | 2009年 / 53卷 / 07期

关键词：

SOI; Metal gate; Short-channel effects; Fully-depleted; BOX; DIBL; Subthreshold slope; LOW-FREQUENCY NOISE; HIGH-K; METAL GATE;

D O I：

10.1016/j.sse.2009.02.009

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper we compare Fully-Depleted Sol (FDSOI) devices with different BOX (Buried Oxide) thicknesses with or without ground plane (GP). With a simple high-k/metal gate structure, the 32 nm devices exhibits Ion/Ioff performances well suited for low power (LP) applications. The different BOX thicknesses and ground plane conditions are compared with bulk 45 nm technology in terms of variability and noise. A 0.499 mu m(2) SRAM cell has been characterized with less than 50 pA of standby current/cell and a SNM of 210 mV @ Vdd 1 V. (C) 2009 Elsevier Ltd. All rights reserved.

引用

页码：730 / 734

页数：5

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