Two-dimensional analysis of substrate-trap effects on turn-on characteristics in GaAs MESFET's

被引：19

作者：

Horio, K ^{[1
]}

Wakabayashi, A ^{[1
]}

Yamada, T ^{[1
]}

机构：

[1] Shibaura Inst Technol, Fac Syst Engn, Omiya, Saitama 3308570, Japan

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2000年 / 47卷 / 03期

关键词：

gate-lag; GaAs MESFET's; substrate traps; surface states; 2-D simulation;

D O I：

10.1109/16.824738

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Effects of substrate traps on turn-on characteristics of GaAs MESFET's are studied by two-dimensional (2-D) simulation. When the off-state gate voltage is much more negative than the threshold (pinch-off) voltage and the surface-state effects are small, abnormal current overshoot and subsequent slow transients are observed for the case with undoped semi-insulating substrate including an electron trap: EL2. Even if the surface-state effects are pronounced to show the large gate-lag, the drain current may show the overshoot-like behavior at relatively early periods. The case of Cr-doped substrate with a hole trap: Cr is also discussed.

引用

页码：617 / 624

页数：8

共 17 条

[1]

Holmes D. E., 1982, IEEE T ELECTRON DEV, V29, P1045

[2] 2-DIMENSIONAL SIMULATIONS OF DRAIN-CURRENT TRANSIENTS IN GAAS-MESFETS WITH SEMIINSULATING SUBSTRATES COMPENSATED BY DEEP LEVELS [J].

HORIO, K ;

FUSEYA, Y .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (08) :1340-1346

[3] Two-dimensional analysis of surface-state effects on turn-on characteristics in GaAs MESFET's [J].

Horio, K ;

Yamada, T .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1999, 46 (04) :648-655

[4] Numerical analysis of substrate effect on turn-on characteristics of GaAs MESFET [J].

Horio, K .

ELECTRONICS LETTERS, 1999, 35 (04) :343-344

[5] NUMERICAL-SIMULATION OF GAAS-MESFETS ON THE SEMI-INSULATING SUBSTRATE COMPENSATED BY DEEP TRAPS [J].

HORIO, K ;

YANAI, H ;

IKOMA, T .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1988, 35 (11) :1778-1785

[6] SIMPLIFIED SIMULATIONS OF GAAS-MESFETS WITH SEMIINSULATING SUBSTRATE COMPENSATED BY DEEP LEVELS [J].

HORIO, K ;

FUSEYA, Y ;

KUSUKI, H ;

YANAI, H .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1991, 10 (10) :1295-1302

[7]

HORIO K, 1996, P GAAS IC S, P175

[8]

KOHNO Y, 1994, P GAAS IC S, P263

[9] ANALYSIS OF SURFACE-STATE EFFECT ON GATE LAG PHENOMENA IN GAAS-MESFETS [J].

LO, SH ;

LEE, CP .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (09) :1504-1512

[10] COMPENSATION MECHANISMS IN GAAS [J].

MARTIN, GM ;

FARGES, JP ;

JACOB, G ;

HALLAIS, JP ;

POIBLAUD, G .

JOURNAL OF APPLIED PHYSICS, 1980, 51 (05) :2840-2852

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