Digital Trimmable 24 GHz Low-Noise Amplifier in 65 nm CMOS

被引:0
|
作者
Vehring, Soenke [1 ]
Ding, Yaoshun [1 ]
Boeck, Georg [1 ,2 ]
机构
[1] Tech Univ Berlin, Microwave Engn, Berlin, Germany
[2] Glomic GmbH, Berlin, Germany
关键词
CMOS integrated circuits; integrated circuit reliability; low-noise amplifiers; microwave integrated circuits; reliability engineering;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 24 GHz low-noise amplifier (LNA) with digitally trimming capability is presented. It is demonstrated, that with the proposed trimming concept, frequency shifts due to model uncertainties, process variations, and underestimated parasitic capacitances can be compensated. As a result, the gain curve of the LNA can be shifted to the desired operating frequency band and thus the overall gain and noise figure of the receiver system can be enhanced. The LNA achieves a peak gain of 20 dB at 23.5 GHz with a 3 dB-bandwidth from 20.8 to 26.5 GHz, a noise figure of 3.4 dB, and an OIP3 of 15 dBm. With digital trimming of switchable capacitors the peak gain can be shifted by 1.5 GHz. Furthermore, it is equipped with ESD protection and can be supplied with a single voltage. The active die size and the power consumption are 0.13 mm(2) and 17 mW, respectively.
引用
收藏
页码:496 / 499
页数:4
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