HW Implementation of Real-Time Road & Lane Detection in FPGA-based Stereo Camera

被引:2
|
作者
Kim, Jung-Gu [1 ]
Yoo, Jae-Hyung [1 ]
机构
[1] VisionST Co Ltd, R&D Ctr, Seoul, South Korea
来源
2019 IEEE INTERNATIONAL CONFERENCE ON BIG DATA AND SMART COMPUTING (BIGCOMP) | 2019年
关键词
road sign; lane detection; road separation; stereo camera; FPGA; real-time; Dynamic Programming;
D O I
10.1109/bigcomp.2019.8679333
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper introduces an HW implementation of real-time road and lane recognition in FPGA-based stereo camera. Information on the road, such as lanes, stop lines, crosswalks, and directional lines is the most basic and essential information for self-driving car. In order to accurately recognition this information, it is necessary to separate roads only from the actual urban road environment. We implemented road separation function in FPGA based stereo camera for real-time computation and shows good experimental results.
引用
收藏
页码:678 / 681
页数:4
相关论文
共 50 条
  • [1] Road and Lane Detection using Stereo Camera
    Kim, Jung-Gu
    Yoo, Jae-Hyung
    Koo, Ja-Cheol
    2018 IEEE INTERNATIONAL CONFERENCE ON BIG DATA AND SMART COMPUTING (BIGCOMP), 2018, : 649 - 652
  • [2] FPGA Based Real-Time Lane Detection and Tracking Implementation
    El hajjouji, I.
    El mourabit, A.
    Asrih, Z.
    Mars, S.
    Bernoussi, B.
    2016 INTERNATIONAL CONFERENCE ON ELECTRICAL AND INFORMATION TECHNOLOGIES (ICEIT), 2016, : 186 - 190
  • [3] Real-time FPGA Rectification Implementation Combined with Stereo Camera
    Mun, Junwon
    Kim, Jaeseok
    2015 IEEE INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS (ISCE), 2015,
  • [4] FPGA-based Real-time Lane Detection for Advanced Driver Assistance Systems
    Hwang, Seokha
    Lee, Youngjoo
    2016 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS), 2016, : 218 - 219
  • [5] A Real-Time System for Lane Detection Based on FPGA and DSP
    Xiao, Jing
    Li, Shutao
    Sun, Bin
    SENSING AND IMAGING, 2016, 17
  • [6] Design and Implementation of an FPGA-Based DNN Architecture for Real-time Outlier Detection
    Mohamed, Nadya
    Cavallaro, Joseph
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2023, 95 (07): : 845 - 861
  • [7] A real-time FPGA-based implementation for detection and sorting of bio-signals
    Iniguez-Lomeli, Francisco Javier
    Bornat, Yannick
    Renaud, Sylvie
    Barron-Zambrano, Jose Hugo
    Rostro-Gonzalez, Horacio
    NEURAL COMPUTING & APPLICATIONS, 2021, 33 (18) : 12121 - 12140
  • [8] A real-time FPGA-based implementation for detection and sorting of bio-signals
    Francisco Javier Iniguez-Lomeli
    Yannick Bornat
    Sylvie Renaud
    Jose Hugo Barron-Zambrano
    Horacio Rostro-Gonzalez
    Neural Computing and Applications, 2021, 33 : 12121 - 12140
  • [9] Design and Implementation of an FPGA-Based DNN Architecture for Real-time Outlier Detection
    Nadya Mohamed
    Joseph Cavallaro
    Journal of Signal Processing Systems, 2023, 95 : 845 - 861
  • [10] Real-time stereo vision-based lane detection system
    Fan, Rui
    Dahnoun, Naim
    MEASUREMENT SCIENCE AND TECHNOLOGY, 2018, 29 (07)