Graphene as Charge Storage Layer in Floating Gate Flash Memory with Highk Tunnel Barrier Engineering

被引:0
作者
Ahmad, M. Hilman [1 ]
Alias, N. Ezaila [1 ]
Hamzah, Afiq [1 ]
Johari, Zaharah [1 ]
Abidin, M. S. Z. [1 ]
Ismail, Razali [1 ]
机构
[1] Univ Teknol Malaysia, Fac Engn, Sch Elect Engn, Computat Nanoelect Res Grp, Johor Baharu 81310, Malaysia
来源
2018 IEEE STUDENT CONFERENCE ON RESEARCH AND DEVELOPMENT (SCORED) | 2018年
关键词
graphene; flash memory; tunnel barrier engineering; data retention; high-k materials;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This study aims to investigate the memory performances of graphene as a charge storage layer in the floating gate with the different type of high-k materials such as silicon nitride (Si3N4), aluminium oxide (Al2O3), hafnium dioxide (HfO2) and zirconium oxide (ZrO2) using Silvaco ATLAS TCAD Tools. The simulation work initially is to validate the experimental work with the simulation data and then determine the performance of flash memory cell with the different type of high-k materials in term of memory window, program and erase characteristics and data retention. The memory window for flash memory cell without high-k material is 15.4V while for the memory window of 1/7nm of silicon dioxide (SiO2)/high-k material of four high-k materials for SiO2/Si3N4, SiO2/Al2O3, SiO2/HfO2 and SiO2/ZrO2 tunnel barrier are 23.0V, 20.0V, 25.4V and 26.0 respectively at the same P/E voltage of +/- 20V programming and erasing voltage. The data retention of four high-k materials shows better data retention from the conventional SiO2. The SiO2/Si3N4, SiO2/HfO2 and SiO2/ZrO2 tunnel barrier are retained by 56% (12.88V), 47% (11.94V) and 33% (8.58V) as compared to conventional SiO2 are retained by 75% (11.6V) after 10 years of -1/1V gate stress. SiO2/Al2O3 tunnel barrier with thickness 1/7nm shows an excellent result among others with 83% (16.60V) data are retained after 10 years of extrapolation.
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页数:5
相关论文
共 17 条
[1]  
[Anonymous], 2013, ATLAS US MAN DEV SIM
[2]   Nonvolatile Memory Cells Based on MoS2/Graphene Heterostructures [J].
Bertolazzi, Simone ;
Krasnozhon, Daria ;
Kis, Andras .
ACS NANO, 2013, 7 (04) :3246-3252
[3]  
German L, 2010, BEYOND THE BIOPHYSICAL: KNOWLEDGE, CULTURE, AND POWER IN AGRICULTURE AND NATURAL RESOURCE MANAGEMENT, P1, DOI 10.1007/978-90-481-8826-0_1
[4]   Study on leakage current mechanism and band offset of high-k/n-InAlAs metal-oxide-semiconductor capacitors with HfO2 and HfAlO dielectric [J].
Guan, He ;
Lv, Hongliang .
THIN SOLID FILMS, 2018, 661 :137-142
[5]  
Hamzah A., 2018, JJAP, V57, P1
[6]  
Hossain N. M., 2014, MULTILAYER GRAPHENE
[7]   High-k dielectrics for future generation memory devices (Invited Paper) [J].
Kittl, J. A. ;
Opsomer, K. ;
Popovici, M. ;
Menou, N. ;
Kaczer, B. ;
Wang, X. P. ;
Adelmann, C. ;
Pawlak, M. A. ;
Tomida, K. ;
Rothschild, A. ;
Govoreanu, B. ;
Degraeve, R. ;
Schaekers, M. ;
Zahid, M. ;
Delabie, A. ;
Meersschaut, J. ;
Polspoel, W. ;
Clima, S. ;
Pourtois, G. ;
Knaepen, W. ;
Detavernier, C. ;
Afanas'ev, V. V. ;
Blomberg, T. ;
Pierreux, D. ;
Swerts, J. ;
Fischer, P. ;
Maes, J. W. ;
Manger, D. ;
Vandervorst, W. ;
Conard, T. ;
Franquet, A. ;
Favia, P. ;
Bender, H. ;
Brijs, B. ;
Van Elshocht, S. ;
Jurczak, M. ;
Van Houdt, J. ;
Wouters, D. J. .
MICROELECTRONIC ENGINEERING, 2009, 86 (7-9) :1789-1795
[8]  
Lin Y. H., 2015, APPL MATH INFORM SCI, V9, P141
[9]  
Mishra A., 2012, MULTILAYER GRAPHENE
[10]  
Mishra AK, 2013, IEEE ELECTR DEVICE L, P1