Energy-Efficient, QoS-Aware Packet Scheduling in High-Speed Networks

In current commercial routers, faster network processor units (NPUs) in line cards (LCs) can significantly improve network QoS performance. However, this improvement may come at a high cost of energy consumption. In this paper, we propose and investigate two classes of QoS-aware DVFS-based packet scheduling schemes. The first class uses queue length (QL) to control execution rates in line cards, whereas the second uses link utilization to achieve the same purpose. Excessive reduction in execution rate to save energy, however, may result in a sharp increase in network delay. To address this challenge, different frequency scaling strategies are proposed, and the performance of their associated schedulers is investigated. The simulation results show that both QL-aware and Load-aware DVFS have potential for significant energy saving in high-speed networks, with acceptable delay performance. Furthermore, a simulation study is carried out to compare the performance of the proposed schemes to similar schemes described in the literature for different network environments and traffic loads. The results show that the m (Q) over bar LA scheme achieves the best results, with performance gains of up to 9.5% energy saving, while meeting the QoS performance of the supported applications.