A High Frequency Compact Noise Model for Double-Gate MOSFET Devices

Silicon-on-insulator (SOI) MOSFETs based on multiple gate structures are excellent candidates to become an alternative to conventional bulk technologies. These devices could be used for high-frequency applications due to the significant increase in the transition frequency f(T). We present compact expressions to model the drain and gate current noise spectrum densities and their correlation for DG MOSFETs. These expressions depend on the mobile charge densities that are obtained using analytical expressions obtained from modeling the surface potential and the difference of potentials at the surface and at the center of the Si doped layer without the need to solve any transcendental equations. Using this model, the DG MOSFET noise performances are studied. The current and noise models can be easily introduced in circuit simulators.