Tuning the dipole at the High-κ/SiO2 interface in advanced metal gate stacks

被引:9
|
作者
Charbonnier, M. [1 ]
Leroux, C. [1 ]
Cosnier, V. [2 ]
Besson, P. [2 ]
Martina, F. [1 ]
Ghibaudo, G. [3 ]
Reimbold, G. [1 ]
机构
[1] CEA LETI Minatec, F-38000 Grenoble, France
[2] STMicroelectronics, F-38926 Crolles, France
[3] IMEP, F-38016 Grenoble, France
关键词
Capacitive measurement; Internal photoemission; Dipole; High-kappa; Fermi level pinning;
D O I
10.1016/j.mee.2009.03.105
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Combining two different electrical characterisation methods on the same MOS capacitors, we demonstrate that the flat band voltage of High-kappa metal gate stack is determined by a dipole at the High-kappa/SiO2 interface. Meanwhile, roll-off of flat band voltage, occurring for thin SiO2 inter layer, is also associated to a dipole variation at this same interface. We have measured its value and we show that: this dipole is highly influenced by the High-kappa material in contact with the SiO2. Moreover, we also demonstrate its strong dependence on the process conditions. Finally, for a same metal gate and depending on the High-kappa in contact with SiO2, we show that this dipole can induce up to 1.7 eV variation in the gate effective work function. However, controlling the dipole magnitude remains a strong issue especially for the thinnest EOT. (C) 2009 Elsevier B.V. All rights reserved.
引用
收藏
页码:1740 / 1742
页数:3
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