Strain Transfer Structure as a Mobility Booster for Fully-Depleted SOI MOSFETs at the 10nm Node

被引：0

作者：

Morvan, S. ^{[1
]}

Andrieu, F. ^{[1
]}

Barbe, J-C ^{[1
]}

Ghibaudo, G.

机构：

[1] CEA, LETI, F-38054 Grenoble 9, France

来源：

2013 14TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (ULIS) | 2013年

关键词：

ELECTRICAL ANALYSIS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents mechanical simulations results of an innovative strain transfer structure. The strain induced by the edge relaxation of a buried SiGe layer is compared to strained SOI (sSOI) wafers for Fully Depleted Silicon-On-Insulator. We studied the influence of different dimensions including the active area and demonstrate a transfer of a tensile stress up to 1.3GPa in the Silicon, corresponding about 80% electron mobility enhancement for logic transistors at the 10nm node.

引用

页码：57 / 60

页数：4

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