LOOPLock: Logic Optimization-Based Cyclic Logic Locking

被引:11
作者
Chiang, Hsiao-Yu [1 ]
Chen, Yung-Chih [2 ]
Ji, De-Xuan [1 ]
Yang, Xiang-Min [1 ]
Lin, Chia-Chun [1 ]
Wang, Chun-Yao [1 ]
机构
[1] Natl Tsing Hua Univ, Dept Comp Sci, Hsinchu 30013, Taiwan
[2] Yuan Ze Univ, Dept Comp Sci & Engn, Taoyuan 32003, Taiwan
关键词
Optimization; Logic gates; Security; Electronics packaging; Delays; Integrated circuits; Inverters; Cyclic logic locking; CycSAT; hardware security; logic optimization; SAT Attack;
D O I
10.1109/TCAD.2019.2960351
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
SAT Attack, CycSAT, and Removal Attack have demonstrated their abilities to break most existing logic locking methods. In this article, we propose a new cyclic logic locking method to invalidate these attacks simultaneously. Our main intention is to create noncombinational cycles to lock a circuit. Specifically, the noncombinational behavior in the noncombinational cycles that is unobservable at the primary outputs (POs) needs to be preserved when the correct key-vector is fed to resist CycSAT, and the noncombinational behavior in the noncombinational cycles affecting POs needs to be preserved when the incorrect key-vector is fed to invalidate SAT Attack. Furthermore, some nodes will be removed when applying our locking method, which is able to defend Removal Attack. The experimental results show the effectiveness and low area overhead of the proposed method.
引用
收藏
页码:2178 / 2191
页数:14
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