Parallelism of Evolutionary Design of Image Filters for Evolvable Hardware Using GPU

被引:0
作者
Wu, Chih-Hung [1 ]
Chiang, Chin-Yuan [1 ]
Chen, Yi-Han [1 ]
机构
[1] Natl Univ Kaohsiung, Dept Elect Engn, Kaohsiung 811, Taiwan
来源
2013 14TH ACIS INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING, ARTIFICIAL INTELLIGENCE, NETWORKING AND PARALLEL/DISTRIBUTED COMPUTING (SNPD 2013) | 2013年
关键词
Parallelism; GPU; evolutionary design; evolvable hardware; Cartesian genetic programming; image filter; GRAPHICS;
D O I
10.1109/SNPD.2013.79
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Evolvable Hardware (EHW) is a combination of evolutionary algorithm and reconfigurable hardware devices. Due to its flexible and adaptive ability, EHW-based solutions receive a lot of attention in industrial applications. One of the obstacles to realize an EHW-based method is its very long training time. This study deals with the parallelism of EHW-based design of image filters using graphic processing units (GPUs). The design process is analyzed and decomposed into some smaller processes that can run in parallel. Pixel-based data for training and verifying EHW solutions are partitioned according to the architecture of GPU. Several strategies for deploying parallel processes are developed and implemented. With the proposed method, significant improvements on the efficiency of training EHW models are gained. Using a GPU with 240 cores, a speedup of 64 times is obtained. This paper evaluates and compares the performance of the proposed method with other ones.
引用
收藏
页码:592 / 597
页数:6
相关论文
共 50 条
  • [21] Research on the Method of Parity Checker Design Based on Evolvable Hardware
    Wang Kuifu
    Yan Jingfeng
    [J]. 2010 THE 3RD INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND INDUSTRIAL APPLICATION (PACIIA2010), VOL III, 2010, : 57 - 59
  • [22] Research on the Method of Parity Checker Design Based on Evolvable Hardware
    Wang, Kuifu
    Yan, Jingfeng
    [J]. APPLIED INFORMATICS AND COMMUNICATION, PT III, 2011, 226 : 119 - 124
  • [23] Implementation of an Adaptive Filter using an Evolvable Hardware Strategy
    Lovay, M.
    Peretti, G.
    Romero, E.
    [J]. IEEE LATIN AMERICA TRANSACTIONS, 2015, 13 (04) : 927 - 934
  • [24] Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing
    Salvador, Ruben
    Otero, Andres
    Mora, Javier
    de la Torre, Eduardo
    Riesgo, Teresa
    Sekanina, Lukas
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 2013, 62 (08) : 1481 - 1493
  • [25] Fast cone-beam CT image reconstruction using GPU hardware
    Yan, Guorui
    Tian, Jie
    Zhu, Shouping
    Dai, Yakang
    Qin, Chenghu
    [J]. JOURNAL OF X-RAY SCIENCE AND TECHNOLOGY, 2008, 16 (04) : 225 - 234
  • [26] VISUAL ANALYSIS OF A CARDIOVASCULAR SYSTEM BASED ON ECG AND ABP SIGNALS USING EVOLVABLE HARDWARE DESIGN
    Xiong, Fan
    Shrestha, Prabhu
    Tanik, Murat
    Tanik, John
    Vasana, Susan
    [J]. JOURNAL OF INTEGRATED DESIGN & PROCESS SCIENCE, 2011, 15 (04) : 49 - 84
  • [27] RETRACTED: Design and implementation of dynamic partial reconfiguration using adaptive evolvable hardware (Retracted Article)
    Geetamma, T.
    Seventline, J. Beatrice
    [J]. 2015 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, SIGNALS, COMMUNICATION AND OPTIMIZATION (EESCO), 2015,
  • [28] A novel and practicable on-chip adaptive lossless image compression scheme using intrinsic evolvable hardware
    He, Jingsong
    Yao, Xin
    Chen, Yunbi
    [J]. CONNECTION SCIENCE, 2007, 19 (04) : 281 - 295
  • [29] Evolutionary Design of Image Filter Using PicoBlaze Embedded Processor
    Zhang, Kai-feng
    Tao, Hua-min
    Xiao, Shan-zhu
    [J]. COMMUNICATIONS AND INFORMATION PROCESSING, PT 2, 2012, 289 : 190 - 197
  • [30] Toward an evolvable neuromolecular hardware: a hardware design fbr a multilevel artificial brain with digital circuits
    Chen, JC
    Chen, RD
    [J]. NEUROCOMPUTING, 2002, 42 : 9 - 34