DCT-domain embedded memory compression for hybrid video coders

被引：10

作者：

Kleihorst, RP ^{[1
]}

van der Vleuten, RJ ^{[1
]}

机构：

[1] Philips Res Labs, NL-5656 AA Eindhoven, Netherlands

来源：

JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | 2000年 / 24卷 / 01期

关键词：

D O I：

10.1023/A:1008162426925

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Hybrid video compression schemes such as MPEG2 and H.263 use an image memory for motion-compensated coding. In VLSI implementations, this image is usually stored in external RAM because of its large size. To reduce the overall system costs, we propose to compress the image by a factor of 4 to 5 before storage, which then enables embedding of the image memory on the encoder IC itself. The proposed encoder architecture remains in the DCT-domain, so motion estimation and compensation are now performed from this domain. To control and guarantee the actual storage, scalable compression is used. A hardware implementation is feasible and worthwhile compared to traditional encoders with no noticeable loss in performance.

引用

页码：31 / 41

页数：11

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