An easy-to-use mismatch model for the MOS transistor

被引：101
|
作者：
Croon, JA
Rosmeulen, M
Decoutere, S
Sansen, W
Maes, HE
机构：
[1] IMEC, B-3001 Louvain, Belgium
[2] Katholieke Univ Leuven, ESAT, B-3001 Louvain, Belgium
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2002年 / 37卷 / 08期
关键词：
device mismatch; modeling; MOSFETs;
D O I：
10.1109/JSSC.2002.800953
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a physics-based mismatch model is presented. It is demonstrated on a 0.18-mum technology that a simple mismatch model can still be used to characterize deep-submicron technologies. The accuracy of the model is examined and found to be within 20% in the strong inversion region. Bulk bias dependence is modeled in a physical way. To extract the mismatch parameters, a weighted fit is introduced. It is shown that the width and length dependence of the mismatch parameters is given by the Pelgrom model.
引用
收藏
页码：1056 / 1064
页数：9
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