GaN-based High Frequency Totem-Pole Bridgeless PFC Design with Digital Implementation

Totem-pole bridgeless PFC is a very promising topology for GaN devices because of very low reverse recovery. However, inherent challenges exist for this topology at zero-crossing point of AC voltage where inductor, current spike is observed which may cause higher harmonics and EMI issue. This paper looks deeply into this phenomena and found two main causes: the transition delay of low frequency leg and the minimum pulse width limit of high frequency leg. A DSP-based digital modulator is designed to address those two issues by applying lead time to the low frequency leg and digital dithering to increase equivalent resolution at the high frequency leg. Some other rules are also summarized to enable robust modulator design, which is the main challenge in this topology. A 500 kHz GaN totem-pole bridgeless PFC converter operating in continuous conduction mode verified the effectiveness of those methods to eliminate the current spike at zero-crossing. All those findings will help the implementation of wide band gap devices in very high frequency PFC circuit.