Individual flip-flops with gated clocks for low power datapaths

Energy consumption has become one of the important factors in digital systems, because of the requirement to dissipate this energy in high-density circuits and to extend the battery life in portable systems such as devices with wireless communication capabilities, Flip-flops are one of the most energy-consuming components of digital circuits, This paper presents techniques to reduce energy consumption by individually deactivating the clock when hip-hops do not have to change their value. Flip-hop structures are proposed and selection criteria given to obtain minimum energy consumption. The structures have been evaluated using energy models and validated by switch-level simulations. For the applications considered, significant energy reductions are achieved.