Towards a Robust Approach to Threshold Voltage Characterization and High Temperature Gate Bias Qualification

被引:3
作者
Habersat, Daniel B. [1 ]
Lelis, Aivars J. [1 ]
Green, Ronald [1 ]
机构
[1] US Army, Opt & Power Devices Branch, CCDC Army Res Lab, Adelphi, MD 20783 USA
来源
2020 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2020年
关键词
Silicon Carbide; MOSFET; threshold voltage; bias temperature stress (BTS); qualification standards; test methods; high temperature gate bias (HTGB); INSTABILITY;
D O I
10.1109/irps45951.2020.9128227
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The threshold voltage hysteresis seen in SiC MOSFETs complicates the direct use of qualification standards such as AEC-Q101 for high-temperature gate-bias effects. We review approaches that are appropriate for use in a production environment and can accommodate this effect, comparing their efficacy. Our findings show that in situ hysteresis measurements can be nearly as effective as those made ex situ, and that threshold instability in modern SiC MOSFETs is more performance matter than reliability problem.
引用
收藏
页数:4
相关论文
共 10 条
[1]   Threshold voltage peculiarities and bias temperature instabilities of SiC MOSFETs [J].
Aichinger, Thomas ;
Rescher, Gerald ;
Pobegen, Gregor .
MICROELECTRONICS RELIABILITY, 2018, 80 :68-78
[2]  
Habersat Daniel B., 2019, Materials Science Forum, V963, P757, DOI 10.4028/www.scientific.net/MSF.963.757
[3]  
Habersat Daniel B., 2016, Materials Science Forum, V858, P833, DOI 10.4028/www.scientific.net/MSF.858.833
[4]  
Habersat DB, 2016, INT RELIAB PHY SYM
[5]   Measurement considerations for evaluating BTI effects in SiC MOSFETs [J].
Habersat, Daniel B. ;
Lelis, Aivars J. ;
Green, Ronald .
MICROELECTRONICS RELIABILITY, 2018, 81 :121-126
[6]   Effect of Threshold-Voltage Instability on SiC Power MOSFET High-Temperature Reliability [J].
Lelis, A. ;
Green, R. ;
Habersat, D. .
GALLIUM NITRIDE AND SILICON CARBIDE POWER TECHNOLOGIES, 2011, 41 (08) :203-214
[7]   Bias stress-induced threshold-voltage instability of SiC MOSFETs [J].
Lelis, A. J. ;
Habersat, D. ;
Lopez, G. ;
McGarrity, J. M. ;
McLean, F. B. ;
Goldsman, N. .
Silicon Carbide and Related Materials 2005, Pts 1 and 2, 2006, 527-529 :1317-1320
[8]   Time dependence of bias-stress-induced SiC MOSFET threshold-voltage instability measurements [J].
Lelis, Aivars J. ;
Habersat, Daniel ;
Green, Ronald ;
Ogunniyi, Aderinto ;
Gurfinkel, Moshe ;
Suehle, John ;
Goldsman, Neil .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (08) :1835-1840
[9]   SiC MOSFET threshold-stability issues [J].
Lelis, Aivars J. ;
Green, Ronald ;
Habersat, Daniel B. .
MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 2018, 78 :32-37
[10]   Basic Mechanisms of Threshold-Voltage Instability and Implications for Reliability Testing of SiC MOSFETs [J].
Lelis, Aivars J. ;
Green, Ron ;
Habersat, Daniel B. ;
El, Mooro .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2015, 62 (02) :316-323