Unified random access memory (URAM) by integration of a nanocrystal floating gate for nonvolatile memory and a partially depleted floating body for capacitorless 1T-DRAM

被引：4

作者：

Ryu, Seong-Wan ^{[1
]}

Han, Jin-Woo ^{[1
]}

Kim, Chung-Jin ^{[1
]}

Kim, Sungho ^{[1
]}

Choi, Yang-Kyu ^{[1
]}

机构：

[1] Korea Adv Inst Sci & Technol, Sch Elect Engn & Comp Sci, Div Elect Engn, Taejon 305701, South Korea

来源：

SOLID-STATE ELECTRONICS | 2009年 / 53卷 / 03期

关键词：

URAM; 1T-DRAM; Nonvolatile memory; Nanocrystal;

D O I：

10.1016/j.sse.2009.01.015

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes a unified memory (URAM) that utilizes a nanocrystal SOI MOSFET for multi-functional applications of both nonvolatile memory (NVM) and capacitorless 1T-DRAM. By using a discrete storage node (Ag nanocrystal) as the floating gate of the NVM, high defect immunity and 2-bit/cell operation were achieved. The embedded nanocrystal NVM also showed 1T-DRAM operation (program/erase time = 100 ns) characteristics, which were realized by storing holes in the floating body of the SOI MOSFET, without requiring an external capacitor. Three-bit/cell operation was accomplished for different applications - 2-bits for nonvolatility and 1-bit for fast operation. (C) 2009 Elsevier Ltd. All rights reserved.

引用

页码：389 / 391

页数：3

共 14 条

[1] Self-assembly of Al2O3 nanodots on SiO2 using two-step controlled annealing technique for long retention nonvolatile memories -: art. no. 073114
Chen, JH
Yoo, WJ
Chan, DSH
Tang, LJ
[J]. APPLIED PHYSICS LETTERS, 2005, 86 (07) : 1 - 3
[2] NROM: A novel localized trapping, 2-bit nonvolatile memory cell
Eitan, B
Pavan, P
Bloom, I
Aloni, E
Frommer, A
Finzi, D
[J]. IEEE ELECTRON DEVICE LETTERS, 2000, 21 (11) : 543 - 545
[3] Nonvolatile memory with molecule-engineered tunneling barriers
Hou, Tuo-Hung
Raza, Hassan
Afshari, Kamran
Ruebusch, Daniel J.
Kan, Edwin C.
[J]. APPLIED PHYSICS LETTERS, 2008, 92 (15)
[4] Metal nanocrystal memory with high-κ tunneling barrier for improved-pata retention
Lee, JJ
Kwong, DL
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (04) : 507 - 511
[5] A novel quad source/drain metal nanocrystal memory device for multibit-per-cell storage
Liu, ZT
Lee, C
Narayanan, V
Pei, G
Kan, EC
[J]. IEEE ELECTRON DEVICE LETTERS, 2003, 24 (05) : 345 - 347
[6] Metal nanocrystal memories - Part II: Electrical characteristics
Liu, ZT
Lee, C
Narayanan, V
Pei, G
Kan, EC
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (09) : 1614 - 1622
[7] LUE HT, IEEE IEDM 05, P547
[8] OHBA R, IEEE IEDM 05, P853
[9] Okhonin S., 2001, 2001 IEEE International SOI Conference, P153
[10] PRINZ EJ, 2003, IEEE NVSM, P56

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