Reliability-Aware Runtime Power Management for Many-Core Systems in the Dark Silicon Era

被引:37
|
作者
Rahmani, Amir M. [1 ]
Haghbayan, Mohammad-Hashem [1 ]
Miele, Antonio [2 ]
Liljeberg, Pasi [1 ]
Jantsch, Axel [3 ]
Tenhunen, Hannu [1 ,4 ]
机构
[1] Univ Turku, Dept Informat Technol, FIN-20520 Turku, Finland
[2] Politecn Milan, Dipartimento Elettron Informaz & Bioingn, I-20133 Milan, Italy
[3] Vienna Univ Technol, A-1040 Vienna, Austria
[4] KTH Royal Inst Technol, Dept Ind & Med Elect, S-16440 Stockholm, Sweden
基金
芬兰科学院;
关键词
Dark silicon; feedback controller; lifetime reliability; networks on chip (NoCs); power management; runtime mapping;
D O I
10.1109/TVLSI.2016.2591798
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Power management of networked many-core systems with runtime application mapping becomes more challenging in the dark silicon era. It necessitates considering network characteristics at runtime to achieve better performance while honoring the peak power upper bound. On the other hand, power management has a direct effect on chip temperature, which is the main driver of the aging effects. Therefore, alongside performance fulfillment, the controlling mechanism must also consider the current cores' reliability in its actuator manipulation to enhance the overall system lifetime in the long term. In this paper, we propose a multiobjective dynamic power management technique that uses current power consumption and other network characteristics including the reliability of the cores as the feedback while utilizing fine-grained voltage and frequency scaling and per-core power gating as the actuators. In addition, disturbance rejecter and reliability balancer are designed to help the controller to better smooth power consumption in the short term and reliability in the long term, respectively. Simulations of dynamic workloads and mixed criticality application profiles show that our method not only is effective in honoring the power budget while considerably boosting the system throughput, but also increases the overall system lifetime by minimizing aging effects by means of power consumption balancing.
引用
收藏
页码:427 / 440
页数:14
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