On-Chip Crosstalk Noise Reduction Model using interconnect optimization Techniques

被引：0

作者：

Hunagund, P. V. ^{[1
]}

Kalpana, A. B. ^{[2
]}

机构：

[1] Gulbarga Univ, Dept Appl Elect, Gulbarga, Karnataka, India

[2] Bangalore Inst Technol, Bangalore 560004, Karnataka, India

来源：

ICSE: 2008 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS, PROCEEDINGS | 2008年

关键词：

D O I：

10.1109/SMELEC.2008.4770282

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents an improved crosstalk 271 model for noise constrained interconnects optimization. The proposed model has simple closed-form expressions, which is capable of predicting the noise amplitude and the noise pulse width of an RC interconnect as well as coupling locations (near-driver and near-receiver) on victim net. This is efficient and sufficiently accurate to be effectively incorporated in state-of-the-art noise calculators(less than 6% error on average compared with HSPICE simulator). In particularly we demonstrate its effectiveness in the following application: Optimization rule generation for noise reduction using various interconnects optimization techniques.

引用

页码：87 / +

页数：2

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