A 30 GHz Low Power & High Gain Low Noise Amplifier with Gm-boosting in 28nm FD-SOI CMOS Technology

被引：0

作者：

Konidas, Georgios ^{[1
]}

Gkoutis, Panagiotis ^{[1
]}

Kolios, Vasilis ^{[1
]}

Kalivas, Grigorios ^{[1
]}

机构：

[1] Univ Patras, Appl Elect Lab, Dept Elect & Comp Engn, Patras, Greece

来源：

2019 8TH INTERNATIONAL CONFERENCE ON MODERN CIRCUITS AND SYSTEMS TECHNOLOGIES (MOCAST) | 2019年

关键词：

LNA; CMOS; G(m)-boosting; 30-GHz Band; 5G; Millimeter-Wave Integrated Circuit;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a 30 GHz Low Noise Amplifier (LNA) in 28nm FD-SOI CMOS technology for 5G applications. The LNA consists of two stages. The first stage is a cascode topology with gm-boosting technique in order to achieve low Noise Figure (NF). The second stage consists of a differential amplifier for the purpose of achieving higher gain. The first and second stages are coupled, using a balun (balanced to unbalanced) transformer. The proposed LNA exhibits a gain of 24.1 dB and the minimum NF of 3.7 dB at 30 GHz. This specific LNA design consumes only 9.3 mW from a power supply of 1V

引用

页数：4

共 50 条

[21] Ultra-Low Voltage Datapath Blocks in 28nm UTBB FD-SOI
Reyserhove, Hans
Reynders, Nele
Dehaene, Wim
2014 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), 2014, : 49 - 52
[22] A Low-Power 28-nm CMOS FD-SOI Reflection Amplifier for an Active F-Band Reflectarray
Landsberg, Naftali
Socher, Eran
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2017, 65 (10) : 3910 - 3921
[23] An LO Frequency Tripler with Phase Shifter and Detector in 28nm FD-SOI CMOS for 28-GHz Transceivers
Gannedahl, Rikard
Sjoland, Henrik
2021 IEEE NORDIC CIRCUITS AND SYSTEMS CONFERENCE (NORCAS), 2021,
[24] A 28 GHz and 38 GHz High-Gain Dual-Band Power Amplifier for 5G Wireless Systems in 22 nm FD-SOI CMOS
Xu, Xin
Li, Songhui
Szilagyi, Laszlo
Matthus, Christian
Finger, Wolfgang
Carta, Corrado
Ellinger, Frank
2020 50TH EUROPEAN MICROWAVE CONFERENCE (EUMC), 2020, : 174 - 177
[25] An Ultra-Low Power Dual-Ring Factorial Delay Locked Loop in 28nm FD-SOI technology
Hoang, Khoa
Deval, Yann
Rivet, Francois
2016 13TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2016, : 557 - 559
[26] Comparative evaluation of Body Biasing and Voltage Scaling for Low-Power Design on 28nm UTBB FD-SOI Technology
Gomez, Ricardo Gomez
Bano, Edwige
Clerc, Sylvain
2019 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED), 2019,
[27] A Gm-Boosting Inductorless Noise-Canceling Low Noise Amplifier in 40-nm CMOS for Quantum Applications
Chaubey, Mahesh Kumar
Liu, Yeke
Chang, Yin-Cheng
Wu, Po-Chang
Tsai, Hann-Huei
Hsu, Shawn S. H.
2024 IEEE/MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM, IMS 2024, 2024, : 866 - 869
[28] A 24-31GHz 28nm FD-SOI CMOS Balanced Power Amplifier Robust to 3:1 VSWR for 5G Application
Diverrez, G.
Kerherve, E.
Cathelin, Andreia
2022 52ND EUROPEAN MICROWAVE CONFERENCE (EUMC), 2022,
[29] A 24-31GHz 28nm FD-SOI CMOS Balanced Power Amplifier Robust to 3:1 VSWR for 5G Application
Diverrez, G.
Kerherve, E.
Cathelin, Andreia
2022 52ND EUROPEAN MICROWAVE CONFERENCE (EUMC), 2022, : 496 - 499
[30] A 24-31GHz 28nm FD-SOI CMOS Balanced Power Amplifier Robust to 3:1 VSWR for 5G Application
Diverrez, G.
Kerherve, E.
Cathelin, Andreia
2022 52ND EUROPEAN MICROWAVE CONFERENCE (EUMC), 2022,

← 1 2 3 4 5 →