The Analyze and Design of High Speed Double Delta Sampling Circuit for CMOS Image Sensor

被引：0

作者：

Liu, Xiaohui ^{[1
]}

Zhao, Yuanfu ^{[1
]}

Liu, Liyan ^{[1
]}

Wang, Chunfang ^{[1
]}

Jin, Xiaofeng ^{[1
]}

Zhao, Yue ^{[1
]}

机构：

[1] BMTI, Beijing 100076, Peoples R China

来源：

6TH INTERNATIONAL CONFERENCE ON DIGITAL IMAGE PROCESSING (ICDIP 2014) | 2014年 / 9159卷

关键词：

CMOS image sensor; double delta sampling (DDS); High speed; pipelined structure;

D O I：

10.1117/12.2064181

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A high-speed double delta sampling (DDS) circuit with pipelined structure for CMOS image sensor (CIS) is presented. Considering the low readout speed of the DDS circuit compare with correcting double sampling (CDS) circuit, We separate the main operation of DDS circuit into two steps, and run the two steps alternately in odd readout column and even readout column, which seems like the pipelined operation. Thus, the readout speed of the DDS will as twice as fast than the traditional DDS. The architecture and readout sequence of the new circuit are introduced in detail. Meanwhile simulation results indicate the proposed circuit can achieve a high speed performance.

引用

页数：5

共 9 条

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