An Ultra-Low Voltage and Low-Energy Level Shifter in 28-nm UTBB-FDSOI

被引:10
作者
Vatanjou, Ali Asghar [1 ]
Ytterdal, Trond [1 ]
Aunet, Snorre [1 ]
机构
[1] Norwegian Univ Sci & Technol, Dept Elect Syst, N-7491 Trondheim, Norway
关键词
Level shifter; subthreshold; low-power; FDSOI; SUBTHRESHOLD; RANGE; CMOS;
D O I
10.1109/TCSII.2018.2871637
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A low-power level shifter capable of up-converting sub-50 mV input voltages to 1 V has been implemented in a 28 nm FDSOI technology. Diode connected transistors and a single-NWELL layout strategy have been used along with poly and back-gate biasing techniques to achieve an adequate balance between the drive strength of the pull-up and pull-down networks. Measurements showed that the lowest input voltage levels, which could be upconverted by the 10 chip samples, varied from 39 mV to 52 mV. Half of the samples could upconvert from 39 mV to 1 V. The simulated energy consumption of the level shifter was 5.2 fJ for an up-conversion from 0.2 V to 1 V and 1 MHz operating frequency.
引用
收藏
页码:899 / 903
页数:5
相关论文
共 50 条
[21]   Low energy/delay overhead level shifter for wide-range voltage conversion [J].
Lanuzza, Marco ;
Crupi, Felice ;
Rao, Sandro ;
De Rose, Raffaele ;
Iannaccone, Giuseppe .
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2017, 45 (11) :1637-1646
[22]   A 0.19-V Minimum Input Low Energy Level Shifter for Extremely Low-Voltage VLSIs [J].
Matsuzuka, Ryo ;
Hirose, Tetsuya ;
Shizuku, Yuzuru ;
Kuroki, Nobutaka ;
Numa, Masahiro .
2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, :2948-2951
[23]   An Ultra Low Voltage Energy Efficient Level Shifter With Current Limiter and Improved Split-Controlled Inverter [J].
Wang, Chao ;
Lim, Yang Wei ;
Ji, Yuxin ;
Huang, Jiajie ;
Lu, Wangzilu ;
Rokhani, Fakhrul Zaman ;
Ismail, Yehea ;
Li, Yongfu .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2024, 71 (05) :2569-2573
[24]   Enhanced Low Voltage Digital & Analog Mixed-Signal with 28nm FDSOI Technology [J].
Arnaud, F. .
2015 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2015,
[25]   An Ultra-Low Area Digital-Assisted Neuro Recording System in 22nm FDSOI Technology [J].
Schueffny, Franz Marcus ;
Hoeppner, Sebastian ;
Haenzsche, Stefan ;
George, Richard Miru ;
Zeinolabedin, Seyed Mohammad Ali ;
Mayr, Christian .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 69 (03) :739-743
[26]   Low-Power Half-Rate Dual-Loop Clock-Recovery System in 28-nm FDSOI [J].
Gimeno, C. ;
Flandre, D. ;
Bol, D. .
2018 IEEE 9TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS), 2018, :59-62
[27]   Ultra-Thin Body and Buried Oxide (UTBB) FDSOI Technology with Low Variability and Power Management Capability for 22 nm Node and Below [J].
Mazurier, J. ;
Weber, O. ;
Andrieu, F. ;
Toffoli, A. ;
Thomas, O. ;
Allain, F. ;
Noel, J. -P. ;
Belleville, M. ;
Faynot, O. ;
Poiroux, T. .
JOURNAL OF LOW POWER ELECTRONICS, 2012, 8 (01) :125-132
[28]   A 32 kb 0.35-1.2 V, 50 MHz-2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS [J].
Grover, Anuj ;
Visweswaran, G. S. ;
Parthasarathy, Chittoor R. ;
Daud, Mohammad ;
Turgis, David ;
Giraud, Bastien ;
Noel, Jean-Philippe ;
Miro-Panades, Ivan ;
Moritz, Guillaume ;
Beigne, Edith ;
Flatresse, Philippe ;
Kumar, Promod ;
Azmi, Shamsi .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64 (09) :2438-2447
[29]   130 nm CMOS Fully Differential SC Filter for Ultra-Low Voltage Σ-Δ Converter [J].
Maljar, David ;
Arbet, Daniel ;
Stopjakova, Viera .
2020 25TH INTERNATIONAL CONFERENCE ON APPLIED ELECTRONICS (AE), 2020, :77-80
[30]   A 28-nm FD-SOI 8T Dual-Port SRAM for Low-Energy Image Processor With Selective Sourceline Drive Scheme [J].
Mori, Haruki ;
Nakagawa, Tomoki ;
Kitahara, Yuki ;
Kawamoto, Yuta ;
Takagi, Kenta ;
Yoshimoto, Shusuke ;
Izumi, Shintaro ;
Kawaguchi, Hiroshi ;
Yoshimoto, Masahiko .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 66 (04) :1442-1453