Effects on 0.13 μm floating-body partially depleted SOI n-MOSFETs in low temperature operation

被引：0

作者：

Martino, JA ^{[1
]}

Pavanello, MA ^{[1
]}

Simoen, E ^{[1
]}

Claeys, C ^{[1
]}

机构：

[1] FEI, Ctr Univ, BR-09850901 Sao Bernardo do Campo, Brazil

来源：

LOW TEMPERATURE ELECTRONICS AND LOW TEMPERATURE COFIRED CERAMIC BASED ELECTRONIC DEVICES | 2004年 / 2003卷 / 27期

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D O I：

暂无

中图分类号：

O414.1 [热力学];

学科分类号：

摘要：

This work studies the effect of halo implantation on the electrical characteristics of deep-submicrometer partially depleted SOI nMOSFET; during low temperature and floating body operation. Parameters such as the Drain Induced Barrier Lowering and the device thermal resistance: have been investigated. It is shown that the combination of floating body operation with halo implantation degrades the DIBL in the temperature: range studied (90 - 300 K) in comparison to devices that did not received this implantation. The halo region causes a more pronounced negative output conductance than for the transistors without a halo implantation. An estimation of the temperature rise for a given dissipated power in both types of devices is made, based on the thermal resistance, which is derived from the output characteristics in function of the temperature.

引用

页码：3 / 15

页数：13

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